AMD Expands Integrated GPU Roadmap with RDNA 4m and Introduces New Targets for Future Zen 6 APUs
AMD continues its quiet yet significant expansion of its graphics roadmap for upcoming APUs, with new details emerging through open-source code updates. Specifically, recent LLVM compiler patches have unveiled the introduction of two new graphics targets, GFX1171 and GFX1172, joining the previously identified GFX1170. All three are categorized under the RDNA 4m label, a designation suggesting an intermediate solution positioned between the current RDNA 3.5 architectures and the anticipated RDNA 4. This discovery is particularly noteworthy as it clarifies AMD's strategy of developing multiple variants of the same architecture for its integrated GPUs, primarily intended for System-on-Chips (SoCs) and Accelerated Processing Units (APUs), rather than discrete graphics cards.
Technical Implications of AMD's New Graphics Targets
The RDNA 4m designation is not directly linked to the discrete GPUs of the RDNA 4 series; instead, it represents an internal evolution within the GFX11 family. Technically, these new targets share similar capabilities, including support for FP8 and BF8 formats, which are increasingly crucial for artificial intelligence workloads.
Furthermore, they feature WMMA (Wave Matrix Multiply Accumulate) instructions, which are fundamental for accelerating matrix operations typical in AI and machine learning applications. This clearly indicates that AMD is optimizing its future APUs not only for gaming but also for advanced computational scenarios.
AMD and the 'Medusa Point' Rumors
Speculation suggests that these integrated GPUs will be part of the Zen 6-based APUs, codenamed 'Medusa Point'. These solutions are expected to succeed the current Zen 5 'Strix Point' chips, which already incorporate RDNA 3.5 GPUs.
However, the true generational leap might arrive with the 'Medusa Halo' variants, which are anticipated to introduce the RDNA 5 architecture and LPDDR6 memory support. In this context, RDNA 4m represents a strategic transitional phase, enabling AMD to introduce incremental improvements and remain competitive without having to wait for a complete architectural overhaul.
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